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Power Design Engineer
上海

Responsibilities

1. Responsible for defining low power methodology development including the DI/DT, IR-drop analysis and optimization
2. Responsible for pre-silicon power estimation and post-silicon power measurement and correlation.
3. Tracking the key power metrics and predicting the power performance in the real scenario
4. Define the chip speed/power binning/Yield strategy
5. Planning the lower power measurement strategy in mass production
6. Responsible for power-performance modeling using the post-silicon power/performance/speed characterization.
7. Defining and researching the chip PPA strategy with Arch/ASIC Implementation/software team

Qualifications

1. MSEE with 5+ years in ASIC
2. Strong background of Low power technologies is a big plus
3. Solid programming in Perl/Python

申请工作
分享此职位
软件工程师 – 驱动
2020.12.31
上海/西安/南京
软件工程师 – 编译器
2020.12.31
上海/西安/南京
Core Design Engineer
2021.01.06
上海

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